1. Field of the Invention
The present invention relates to a solid-state image sensor, a method of manufacturing the same, and an imaging system.
2. Description of the Related Art
As a solid-state image sensor, there exists a MOS solid-state image sensor including a pixel region and a peripheral circuit region. The pixel region includes a photoelectric conversion element and an amplification MOS transistor that outputs a signal corresponding to the charges of the photoelectric conversion element to a column signal line. The peripheral circuit region includes the pixel region and a circuit that drives the pixels or processes the signal output to the column signal line. One of the causes of noise generated in the MOS solid-state image sensor is the hot carrier generated in a MOS transistor. The hot carrier is generated by a strong electro field applied to a p-n junction formed from a drain region and a channel edge when a voltage is applied to the gate of the MOS transistor. In a device that handles a small signal, like the MOS solid-state image sensor, noise generated by the hot carrier can be especially problematic.
A noise reduction method disclosed in, for example, Japanese Patent Laid-Open No. 2008-41726 makes the impurity concentration of the source and drain regions of the MOS transistor in the pixel region lower than that in the peripheral circuit region. Also described is forming a peripheral MOS transistor having an LDD (Lightly Doped Drain) structure in the peripheral circuit region. This method allows the source and drain regions to form under conditions suitable for each of the pixel region and the peripheral circuit region. More specifically, since the field intensity is reduced in the channel and the drain region formed under the gate of the peripheral MOS transistor, the influence of the hot carrier can be reduced. In addition, since the MOS transistor in the pixel region does not have the LDD structure, the etching step of forming a sidewall spacer on the sidewall of the gate electrode in the pixel region is unnecessary. This makes it possible to reduce the influence of noise such as a dark current generated by etching damage. The drain region of the MOS transistor in the pixel region contains the impurity at a low concentration, although it does not have the LDD structure. For this reason, the influence of the hot carrier can be reduced even in the MOS transistor of the pixel region.
The recent solid-state image sensor is required to miniaturize the pixels and increase the number of pixels while maintaining or improving the photoelectric conversion characteristics such as the sensitivity and the dynamic range. To meet these requirements, it is effective to miniaturize regions other then the photoelectric conversion element in the pixel region while suppressing reduction of the photoelectric conversion element area.
However, miniaturizing the MOS transistor to read a signal based on the signal charges of the photoelectric conversion element arranged in the pixel region may degrade the driving capability of the MOS transistor. Especially when the impurity concentration of the source and drain regions of the MOS transistor in the pixel region is lowered to reduce the influence of the hot carrier, as described in Japanese Patent Laid-Open No. 2008-41726, the source resistance of the MOS transistor increases. For this reason, the driving capacity of the MOS transistor is low, leading to disadvantage in the high-speed read operation.